The present invention relates to a method of suppressing variation of control voltage-output power characteristic of a multistage bias circuit with regard to high-frequency power of a wireless communication device, and particularly to a method of suppressing variations among products of control voltage-output power characteristic due to temperature variation or process variation.
Traditionally, power amplification modules equipped with a variable gain function that makes the output power variable by changing the bias condition of a multistage power amplifier have been widely applied to portable wireless communication devices. One of the problems with the multistage power amplifier is drastic change of control voltage-output power characteristic nearby the threshold voltage of a transistor. FIG. 1 illustrates an example of a conventional multistage power amplifier.
FIG. 1 is a block diagram showing a three-stage bias circuit, which is an example of a conventional multistage power amplifier. In addition, FIGS. 2(a) and 2(b) are graphs representing the variation of bias voltage Vapc, drain drive current ID1, ID2 and ID3, and the three-stage bias circuit Pout when controlled by the bias circuit of FIG. 1. Here, the bias voltage Vapc, is a signal for feedback-controlling a high-frequency detection signal by comparing a transmission request signal and a detection signal.
The three-stage bias circuit includes a first bias circuit 1, a second bias circuit 2 and a third bias circuit 3, which are serially-connected. Matching circuits are coupled between respective bias circuits and at the output side of the third bias circuit 3.
A current mirror circuit is applied to the first bias circuit 1, the second bias circuit 2, and the third bias circuit 3 of the three-stage bias circuit. The bias circuit of each stage is controlled by the electric current output from an APC (automatic power control circuit) 4.
The APC 4 is a control circuit that outputs control current Ibias to the bias circuit of each stage as appropriate, after voltage to current conversion of the input Vapc.
FIG. 2 (a) is a graph illustrating how the drain drive current ID of each amplifier varies according to the control voltage Vapc added to the APC of the three-stage amplifier bias circuit, and FIG. 2 (b) is a graph illustrating how the output Pout (in dbm) of the three-stage amplifier bias circuit varies according to the voltage Vapc added to the APC of the three-stage amplifier bias circuit.
That is, the APC of the three-stage amplifier bias circuit performs a linear current control of the first and second stages from the start of control. On the other hand, a control that increases the drain drive current ID later and more steeply than the first and second stages is performed on the third stage after a voltage exceeding a certain level has been added to the control voltage Vapc (see FIG. 2 (a)).
Such a control brings about a steep variation at the start-up of the current because mutual conductance (gm) of an FET is proportional to the square root of the drain drive current ID, and the variation becomes approximately linear thereafter. By controlling the output Pout of the three-stage amplifier bias circuit in this linear section, it is possible to provide a high-frequency power amplification module having superior control characteristics.
Japanese Patent Laid-Open No. 2001-102881 (Patent Document 1) discloses a method of providing a multistage, high-frequency power amplification module comprising a plurality of serially-connected MOSFETs, which smoothens the gradient of the linear section to improve control characteristics thereof.
However, there remains a problem even if the control characteristics are improved by improving the linear section as disclosed in the patent document 1.
In other words, there exist variations among products at the control in a section accompanied with a steep variation before reaching the linear section, that is, at the start-up. FIGS. 3(a) and 3(b) are graphs illustrating how the output Pout of the three-stage amplifier bias circuit varies due to variations among products. FIG. 3 (a) is a graph illustrating how the drain drive current ID of each amplifier varies according to the control voltage Vapc added to the APC of the three-stage amplifier bias circuit, and FIG. 3 (b) is a graph illustrating how the output Pout of the three-stage amplifier bias circuit varies according to the voltage Vapc added to the APC of the three-stage amplifier bias circuit.
As can be seen in FIG. 3 (a), variations among products first occur in the drain drive current ID3 (ID3-1, ID3-2, ID3-3) of the third stage which is output from the APC. With this being the primary factor, errors may also be included in the output Pout of the three-stage amplifier bias circuit (see FIG. 3 (b) Pout-1, Pout-2, Pout-3). In other words, control becomes difficult due to overly high sensitivity to bias when setting the output power at a low power level using control bias without being able to sufficiently suppress gain variation.
The present invention has been made in view of the above circumstances and provides a bias circuit for gain control that can reduce gain variation at low-power output, facilitate setting of output power, and is unlikely to be affected by variation in element values and variations among products.
The other purposes and the new feature of the present invention will become clear from the description of the present specification and the accompanying drawings.